Voltage level translating circuitry is required in many modern day digital electronic systems for shifting the voltage levels of logical "ones" and logical "zeros" provided by logic systems coupled to the input terminal thereof to other magnitudes suitable for driving other kinds of logic systems coupled to the output terminal thereof. For example, such circuitry is required for interfacing transistor-transistor logic (TTL), emitter coupled logic (ECL), NMOS logic or circuitry providing non-conventional digital voltage levels to low threshold, complementary, metal oxide semiconductor (CMOS) circuitry. To perform this function, the translating circuitry must, for example, convert input logical "zero" signals having magnitudes of between 0 and 0.5 volts to a CMOS "zero" level of 0 volts and input logical "one" signals having magnitudes of between 2.4 and 3 volts to a CMOS logical "one" level having a magnitude of 5 volts.
Prior art level translating circuits for performing the digital signal level translations are sometimes preceded by line receivers. Such line receivers are utilized to compensate for the ground potential of the receiving circuitry being at a substantially different potential than the ground level of the remotely located transmitting or sending circuitry. Such line receivers amplify and rereference the incoming signal to the ground potential of the receiving circuitry unit. Moreover, such prior art circuitry may also require photo diodes to provide further isolation between the incoming data line and the receiving circuitry.
Prior art systems including voltage translating, rereferencing and isolating circuitry tends to be complex and expensive. Furthermore, some prior art circuitry is not suitable for being provided in economical, compact and reliable monolithic integrated circuit form such as on a single CMOS integrated circuit chip along with other CMOS circuitry because such prior art circuits cannot compensate for process induced variations in device characteristics from wafer-to-wafer, for instance. In addition, some prior art circuitry for performing digital level translations and ground potential rereferencing requires the use of more than two power supply potentials thereby increasing cost and complexity.